Native Memory Driver

Direct memory interface driver for cocotb testbenches. Provides low-level read/write access without protocol overhead — useful for register bank testing and raw memory-mapped peripherals.

Quick Start

from routertl.sim import Tb
from sim.cocotb.tb.drivers.native_mem import NativeMemMaster

@cocotb.test()
async def test_native_mem(dut):
    tb = Tb(dut)
    await tb.start_clock()
    await tb.reset()

    mem = NativeMemMaster(tb, prefix="MEM")
    await mem.write(0x00, 0x12345678)
    val = await mem.read(0x00)
    assert val == 0x12345678

API

::: sim.cocotb.tb.drivers.native_mem options: show_root_heading: true show_source: true show_if_no_docstring: false